Double patterning technology allows for manufacturers to achieve a small feature size that is beyond a resolution limitation of an exposure system. For example, using conventional double patterning technology, the formation of fine pitch patterns may include forming sacrificial patterns using, for example, a photolithography process, forming spacers on sidewalls of the sacrificial patterns, removing the sacrificial patterns, and etching an etch target layer using the spacers as an etch mask. However, as integration density of the semiconductor device increases, there is an increasing demand for more advanced patterning methods.